Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
basic 3 6 FB2 MC5 STD SLOW 40 I/O/GTS2 O  
casinh_out 8 9 FB1 MC10 STD SLOW 12 I/O O  
map_selftest 3 5 FB1 MC13 STD SLOW 18 I/O O  
mode_select<0> 1 1 FB1 MC18 STD     (b) (b) RESET
mode_select<1> 1 1 FB1 MC17 STD   24 I/O I RESET
mode_select<2> 1 1 FB1 MC16 STD   22 I/O I RESET
ram1_ce 13 14 FB2 MC14 STD SLOW 28 I/O O  
ram1_oe 8 11 FB2 MC15 STD SLOW 27 I/O O  
ram2_ce 2 12 FB2 MC16 STD SLOW 26 I/O O  
ram2_oe 8 11 FB2 MC17 STD SLOW 25 I/O O  
ram_a<14> 4 5 FB2 MC1 STD SLOW 1 I/O O  
ram_a<15> 4 5 FB1 MC1 STD SLOW 2 I/O O  
ram_a<16> 5 6 FB1 MC2 STD SLOW 3 I/O O  
ram_a<17> 4 5 FB2 MC4 STD SLOW 43 I/O O  
ram_a<18> 2 4 FB2 MC2 STD SLOW 44 I/O O  
ram_we 8 13 FB1 MC14 STD SLOW 19 I/O O  
rd_led 8 10 FB1 MC4 STD SLOW 4 I/O O  
registered_halt 1 1 FB1 MC15 STD   20 I/O I RESET
wr_led 8 11 FB2 MC3 STD SLOW 42 I/O/GTS1 O  
write_protect 1 1 FB1 MC12 STD   14 I/O I RESET